AI · Web3 · Tech trends and insights at a glance
AI · Web3 · Tech trends and insights at a glance
Legendary chip architect Jim Keller and DIY semiconductor hacker Sam Zeloof have announced they are co-founding a fabrication startup. The venture raises a question the industry has long treated as settled: does building chips still require the resources of a nation-state, or are the barriers finally showing cracks?
When Jim Keller decided to co-found a fabrication startup with Sam Zeloof, the semiconductor world collectively raised an eyebrow. Keller's reputation rests on design — the AMD K8 that revived a failing chipmaker, the architectural foundations beneath Apple's earliest mobile processors, the vision that shaped Tesla's first in-house AI chip. Zeloof, meanwhile, became a cult figure by manufacturing actual working transistors in his garage, bypassing the billion-dollar cleanroom industry through ingenuity and open-source process recipes. That these two are going into the fab business together is either the most audacious move in recent chip history or a precisely calculated bet on a market gap that the industry's giants have overlooked.
The economics of leading-edge semiconductor manufacturing have become almost surreal in their scale. A single ASML EUV lithography tool costs upward of $200 million. A new fab capable of producing chips at five nanometers or below requires capital exceeding $20 billion, and the queue for critical equipment stretches years into the future. TSMC's Arizona expansion alone carries a price tag approaching $40 billion — and that figure comes with substantial subsidies from the U.S. CHIPS Act. The result is a market structure that functions as a near-monopoly: TSMC, Samsung, and Intel are the only players capable of competing at the frontier, and even Intel has struggled to maintain its position there.
What makes this moat so durable is not just capital but accumulated process knowledge. The yield rates that define profitability in chip manufacturing are the product of decades of iterative improvement — thousands of incremental optimizations to materials, temperatures, etch rates, and inspection protocols that no external actor can simply purchase. TSMC's competitive advantage is not that it owns the best machines; it is that its engineers understand those machines better than anyone else on earth. That kind of institutional knowledge must be grown, and it grows slowly. No government subsidy or startup funding round accelerates it.
The narrative of semiconductor manufacturing as exclusively the domain of nation-state-scale capital projects misses a crucial point: the leading edge is only one slice of the market. Across automotive electronics, industrial sensors, MEMS devices, photonic components, and small-volume defense applications, mature process nodes — 28 nanometers and above — remain entirely adequate. These segments do not require EUV. They do not require $20 billion fabs. And they represent a substantial and structurally underserved portion of global chip demand, particularly as supply-chain diversification has become a strategic imperative for customers who cannot afford to bet everything on Taiwan.
Zeloof's garage experiments established a provocative proof of concept. Working with homemade lithography equipment and open-source process flows, he demonstrated that functional semiconductor structures could be fabricated without commercial-scale infrastructure. The feature sizes were nowhere near competitive for modern logic chips, but the experiment reframed the central question from "is it possible to make chips cheaply?" to "which specific chips can be made cheaply, and for whom?" That reframing is the intellectual foundation of any credible low-cost fab strategy — and it is the kind of reasoning that a designer of Keller's caliber is well-positioned to translate into a product roadmap.
Nanoimprint lithography offers another pathway worth watching. Unlike photolithography, which projects patterns using light, NIL physically stamps nanostructures onto a substrate, potentially achieving fine feature sizes at substantially lower equipment cost. Yield and uniformity challenges have kept it from displacing optical lithography in high-volume logic production, but for display components, optical metasurfaces, and certain memory structures, it is already commercially deployed. As the technology matures, it may carve out niches that bypass ASML's near-monopoly on advanced patterning equipment entirely.
The structural conditions for disrupting TSMC's dominance are worth examining honestly, because the rhetoric around semiconductor democratization tends to outrun engineering reality. The geopolitical argument is real: concentrated fabrication capacity in Taiwan carries systemic risk that governments, hyperscalers, and defense contractors all recognize. The CHIPS Act, Japan's RAPIDUS initiative, and the EU Chips Act collectively mobilize hundreds of billions in subsidies aimed at redistributing that risk. But these programs are producing additional instances of the same capital-intensive model, not alternatives to it. Building a second TSMC in Arizona moves the concentration; it does not dissolve it.
Keller and Zeloof's venture, if it succeeds, would demonstrate something more structurally interesting: that a commercially viable fab can be built and operated at a fraction of the traditional cost by targeting the right markets. The open-source PDK ecosystem has already made meaningful progress on the software and design side — SkyWater's 130nm process, accessible through Google's shuttle program, has enabled thousands of researchers and small teams to tape out real chips without proprietary design kits. What has been missing is a commercially ambitious, well-capitalized partner on the manufacturing side.
Keller's track record suggests he understands where architectural innovation intersects with market timing. His ability to attract capital, talent, and anchor customers will matter enormously in a business where fixed costs are front-loaded and payback horizons are long. The fab business also demands a fundamentally different operational mindset from chip design — yield engineering, customer process qualification, and materials procurement are not skills that transfer automatically from architecture work. The outcome is genuinely uncertain. But the fact that this attempt is being made by people with a specific, defensible thesis about market structure — rather than by enthusiasts armed only with optimism — makes it one of the more consequential bets in the semiconductor industry this decade.
Fabs on the Fault Line, How a Single Earthquake Could Halt the AI Chip Supply Chain
Two major earthquakes striking the same week — one in Venezuela, a magnitude 7.2 off Japan's Sanriku coast — underscored an uncomfortable truth: almost all advanced AI compute is manufactured along the narrowest, most seismically active corridor on Earth. With EUV monopoly, advanced packaging, and HBM concentrated across Taiwan and Kyushu, a single strong quake represents a genuine single point of failure for global AI infrastructure. Geographic dispersion and machine-learning earthquake early warning are emerging as the new variables of supply-chain resilience.
Where Should the Megafab Go, Korea's Chip Siting Dilemma Between Clustering and Regional Balance
When word leaked that off-capital semiconductor investment was being finalized in a private meeting between Samsung's chairman and the president, markets misread it as a corporate siting decision. It is something larger: the moment when the agglomeration logic that has concentrated Korean chipmaking into a single point south of Seoul began to be politically renegotiated. Fab location has become a national equation tangling power infrastructure, asset inequality, and industrial sovereignty.
Keller and Zeloof's Garage Fab Bet Against the Capital-Intensity Myth of Chipmaking
Atomic Semi, founded by Jim Keller and Sam Zeloof, challenges the orthodoxy that chips demand tens of billions in capital and an ASML EUV monopoly. The real question is whether small, cheap fabs can carve out a genuine niche in specialty and prototype silicon, or whether they remain a charismatic gesture against an unmovable industry.